PhD defence - Yesid Mora

Oct. 17th, 2019 - Oct. 17th, 2019

On 17th of October a PhD defence of our colleague, Yesid Mora, took place at the University of West Bohemia in Pilsen. The defence was supervised by Doc. Dr. Ing. Vjačeslav Georgiev and Ing. Radek Holota, Ph.D. The topic of the thesis is: "ADVANCED FPGA-BASED READOUT ELECTRONICS FOR STRIP DETECTORS".


Strip detectors provide a cheaper way of particle tracking, counting, and with the latest generation of ASICs also spectroscopy and timing, compared to pixel detectors. Advantages like front-end ASICs located next to the sensor (where it can be shielded from primary irradiation easily), no mentionable heat transfer between sensor and ASIC and, possibility of covering bigger areas make the strip detectors an interesting option in applied physics.

The aim of the thesis was to investigate the performance of strip detectors as spectroscopes by measuring typical sources of ionizing particles, such as photons or alpha-particles, having a well-defined energy. To this end a 128-strip low noise FPGA-based readout system was fabricated alongside a corresponding dedicated software tool and connected to a Si strip sensor.

In addition, adequate equalization and calibration methods were developed in order to get a more uniform response from the channels and hence better energy resolution. In order to read all 128 channels of the sensor employed, 4 independent readout ASICs, featuring 32 channels each, had to be used.

Key words:

Ionizing radiation, reversed-biased diode, electron-hole pair, strip detector, readout electronics, shaping time, spectroscopy, ASIC, FPGA, VHDL.

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